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MX Foundation 4
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MX Foundation 4
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Each section below presents a part of the ASCB standard.
ASCB supports the following message types:
The first five are messages generated by the bus controller (BC messages), while the last is generated by the users (user data) in response to the user request message. It must also be noted that C1/C2 Bus Controller status messages only exists on a version C bus, while Transfer Control messages can only be seen on a version A bus.
Basically, each ASCB message is encapsulated in an HDLC format as follows:
<SYNC> <FLAG1> <ASCB message> <CRC> <FLAG2> <MARK>
Where
SYNC: Synchronization pattern, 11 bits FLAG1: Opening flag character, 7E (0111 1110) ASCB message: ASCB-specific message CRC: CCITT 16 bits Cyclic Redundancy Check FLAG2: Closing flag character, 7E (0111 1110) MARK: Mark character, FF (1111 1111), before the transmitter goes idle
The HDLC transmitter uses zero-insertion in order to avoid the occurrence of flags and marks in the data. A zero bit is inserted after the fifth 1 if six consecutive 1’s are found (except for the flag and mark characters), and those 0’s are stripped by the HDLC receiver.
The HDLC transmitter uses Manchester encoding mainly for two purposes:
<SYNC> 7E 80 <CRC> 7E FF Where CRC = 0884.
<SYNC> 7E 81 <CRC> 7E FF Where CRC = 8195.
<SYNC> 7E XX <CRC> 7E FF Where XX is the request address (for example, 8B for EFIS-3 and EFIS-4 basic data).
<SYNC> 7E W1 W2 W3 W4 W5 <CRC> 7E FF Where W1 to W5 are 16 bits words. W1 bit 0-7 is the BC address: A4 to A7 for BC1 to BC4 respectively. W5 is a checksum (non-complemented with no carry) on W1 to W4.
<SYNC> 7E W1 W2 W3 W4 W5 W6 W7 <CRC> 7E FF Where W1 to W7 are 16 bits words. W1 bit 0-7 is the BC address: A4 to A7 for BC1 to BC4 respectively. W5 is a spare word W6 is a checksum (non-complemented with no carry) on W1 to W5. W7 is a software-computed 16 bits CRC on W1 to W6 (the following HDLC CRC will always have a value of 0).
<SYNC> 7E XX <CRC> 7E FF Where XX is 8A for transfer to pilot EFIS, and 8E for transfer to copilot EFIS.
<SYNC> 7E W1 … Wn <CRC> 7E FF Where W1 to Wn are 16-bit words. W1 bit 0-7 is the user address. Wn is a checksum or a 16-bit CRC (depending on the user). The value of n is variable from user to user, but it is always constant for a given user. A typical value of n is 68 for FWC-1, FWC-2, FWC-3 and FWC-4. For that user, W68 is a checksum on W1 to W67.
Warning: The user data must always be transmitted as words (two bytes) on the bus. For test purposes, the IP module allows transmitting an odd number of bytes but the hardware CRC, software CRC and checksum will return unexpected values.
A minimum of 120 microseconds between the bus controller request and user broadcast response. This gap is measured from the beginning of the mark of bus controller request to the end of synch of the user broadcast response.
Three different terminal modes exist:
A terminal operating as a bus monitor shall receive bus traffic and extract selected information. While operating as a bus monitor, the terminal shall not respond to any messages. All information obtained while acting as a bus monitor shall be strictly used for off-line applications (e.g., flight test recording, maintenance recording or mission analysis) or to provide the back-up bus controller sufficient information to take over as the bus controller.
A terminal operating as a bus controller shall be responsible to send data bus commands, participating in data transfers, and monitoring system status as defined in the ASCB standard. Only one terminal shall be in active control of a data bus at any one time.
A user shall operate in response to valid commands received from the bus controller.
